IC Resources Ltd

Senior Verification Engineer

Location
Austria
Salary
challenge for senior verification engineer
Posted
25 Dec 2017
Closes
22 Jan 2018
Ref
JO-1710-116170
Contact
Nicole Lamprecht
Job Function
Design, Test
Specialist Area
FPGA & ASICS
Contract Type
Permanent
Hours
Full Time
Senior Design Verification Engineer (m/f)

Job description / tasks and responsibilities:
*Supporting digital design verification and top level simulations
*Supporting best practice standardization and improvement throughout the organisation
*Participation in internal and external design reviews of verification and simulations with project teams and with customers

Education/Experience:
*Degree in Electronic Engineering, Informatics or similar
*Minimum 5 years experience of digital design verification taking significant responsibility for DV
*Experience in coverage tracking, including writing scripts to generate tracking reports
*Experience in building and debugging VIP and test benches
*Digital IC design experience
*At least 10 years experience in IC design in total
*Experience interfacing with customers

Place of Employment: Premst├Ątten / Austria / Europe