Analog IC Layout Engineer - SERDES - Switzerland
Analog IC Layout Engineer - SERDES
Salary depending on experience
A new opportunity has arisen for a leader in the development of energy efficient communication applications. They are currently seeking an Analog IC Layout Engineer to join their team in Switzerland.You will be tasked with the Analog/Mixed Signal IC Layout of High Speed Serdes designs in FinFet technology 16nm and below.Industry degree qualified you should have good experience in the fundamental concepts of the Analog/Mixed Signal IC Layout of Serdes designs in lower process nodes, 16nm and below. Experience is required in Analog/Mixed Signal IC Layout of High Speed Analog/Mixed Signal ICs ideally in the GHz or Gb/s range for PLL or HF circuits such as amplifiers, TX, RX, low noise and buffers.
For more information and to apply please contact Ane at IC Resources today!