Principal Digital IC Verification Engineer - Austria

Principal Digital IC Verification Engineer
Austria
Excellent salary + benefits package

Our client is one of the most innovative IC development companies in the industry today. Creating state-of-the-art mixed-signal IC devices, the organisation is undergoing rapid international expansion and as part of this, they seek a Principal Digital IC Verification Engineer to play a leading role out of their office in Austria.

Essentially the role of the Principal Digital IC Verification Engineer to lead the development process of the company's niche-market mixed-signal products. This role will involve working closely with the Project Manager and will be a technically challenging 'hands-on' verification role using current verification methodologies. You will be working on high performance ICs geared towards power consumption and efficiency for today's booming consumer devices.

Essential requirements:
* The ideal candidate will have extensive experience in state-of-the art verification methodologies owning and leading the verification of SoCs
* SystemVerilog for verification using advanced verification methodologies (OVM/UVM or similar such as Specman, e, SystemC, etc)
* Assertions based verification
* Constraint random driven verification
* Fluent in either Verilog or VHDL RTL coding and ASIC design methodology

Experience in the following is desirable, however not essential:
- Low power design
- Analog / mixed-signal design
- Team lead / project management

This is a superb chance to join a strong semiconductor company offering highly competitive salary packages and international work opportunities.

Contact Dave Dixon at IC Resources for further details.

Key words: Digital, ASIC, ASSP, IC, SoC, Verification, RTL, VHDL, Verilog, OVM, UVM, SystemVerilog, Specman, e, SystemC, C++, class-based, assertions, Semiconductor, Austria.