Join a newly-opened design centre based in Reading as a DFT Engineer. This is a chance to join an established multinational IC design organisation, and be part of building up the new UK office.
This company has been in successful operation for over a decade, now with 160 employees. To accommodate their growing business and expanding project pipelines, a new UK office in Reading was opened early in 2018, now with new opportunities for skilled DFT Engineers. This position allows for UK remote working.
Part of your job function will be working with the chip architecture team to define DFT specifications and define the chip test interface along with developing and implementing DFT architecture, Implementing DFT infrastructure and working with the validation team to verify DFT implementations and implement design changes.
· At least 5 years of DFT experience.
· Knowledge about industrial standards and practices in DFT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time.
· Experience developing DFT specifications and driving DFT architecture and methods for designs
· Knowledge of industry standards DFT and design tools.
· Solid Understanding of design verification (DV) methodologies for validating DFT implementation in simulation pre-silicon
· Experience in debugging ATPG patterns, Compressed ATPG patterns, MBIST, and JTAG/1500 related issues
· Experience with STA constraints development and analysis for DFT modes and SDF simulations
· Experienced in silicon bring-up, debug, and validation of DFT feature
· Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools.
If you match the experience listed and are keen to apply then please get in touch. This position allows for UK remote working, you must also be eligible to work in the UK/EU.
+44 (0) 118 988 1107LinkedIn: https://www.linkedin.com/in/rachel-mason-33b247b1/