Senior ASIC Design Verification Engineer
Fantastic career opportunities with global leader in wireless communications SOC'sin their expanding development centre in Cork, Ireland.
As part of their next growth phase, they are seeking skilled ASIC / SOC Verification Engineers to join their CPU and SOC development teams.
The ideal candidates will have :
· Experience in design, testing and verification in hardware and software on SoCs and SoC Methodologies for verifying complex units on SoC using industry standard tools and technologies
· Proficient in developing unit and SoC level test benches using OVM/UVM
· Constrained random functional verification environment in System Verilog
· Experience in Gate Level Simulation (GLS) verification flow for SoC verification.
· Experience of pre and post-silicon verification testflow and automated test benches
· Strong knowledge of test-plan generation, coverage analysis transaction level modeling, pseudo and constrained random techniques, assertion based and formal verification techniques with System Verilog
· Verilog, C/C++, System C, Java, TCL/Perl/shell-scripting required
· Building and leading verification teams is a plus
· RTL design and front end design flow experience
· Excellent communication skills
Work permits can be offered to candidates who are currently in employment within the EU.
Please contact Dave Dixon at IC Resources for more details, and to register your interest.