IC Resources Ltd

Digital IC Verification Engineer

Location
Switzerland
Salary
Excellent base salary + benefits
Posted
23 Aug 2018
Closes
20 Sep 2018
Ref
JO-1807-133681
Contact
David Dixon
Job Function
Design
Contract Type
Permanent
Hours
Full Time
Digital IC Verification Engineer
Switzerland
Salary 100-120k CHF depending on experience.

This is an opportunity for an experienced Digital IC Verification Engineer to join a rapidly expanding company based in the scenic and highly desired French speaking part of Switzerland.

Preferred Skills :
* Digital IC verification background with at least some Specman/SV UVM exposure
* Knowledge on Metrics driven verification including test planning and coverage closure
* Constrained random testbench development, SVA and formal verification is beneficial.
* Good scripting techniques and regression set-up and management
* Experience on mixed signal verification and behavioural modelling is an added bonus

You will be self motivated with strong sense of ownership and responsibility. Good communication skills in English are ideal with knowledge in the French language an asset.
Key words: Digital, IC, ASIC, SOC, Verification, Engineer, Specman, SystemVerilog, UVM, OVM, SVA, assertions, formal, mixed-signal, AMS, Location: French speaking part of Switzerland.

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