Analog IC Layout Engineer - SERDES
Analog IC Layout Engineers can join a leader in the development of energy efficient communication applications in their new design centre in Copenhagen to work on the Analog/Mixed Signal IC Layout of High Speed Serdes designs in FinFet technology 16nm and below.
As the industry degree qualified Analog IC Layout Engineers you should have good experience in the fundamental concepts of the Analog/Mixed Signal IC Layout of Serdes designs in lower process nodes, 16nm and below. Experience is required in Analog/Mixed Signal IC Layout of High Speed Analog/Mixed Signal ICs ideally in the GHz or Gb/s range for PLL or HF circuits such as amplifiers, TX, RX, low noise and buffers.
For more information ab Analog IC Layout Engineers in Copenhagen and to apply please contact Ane at IC Resources today!