Junior Digital Physical Design Engineer
Junior Digital Physical Design Engineer - Grenoble
Competitive salary upon experience
We are looking for a Digital Physical Design Engineer to join our expanding ASIC Design client based in Grenoble. This position would suit either a recently-qualified graduate with some relevant project / internship experience, or an engineer with a year or so's experience in industry. Excellent training and career development opportunities on offer!
In this role you'll have the chance to work closely with senior engineers on all stages of the physical implementation process, including floorplanning, clock tree synthesis (CTS), Place & Route, timing analysis (STA), DRC and LVS through to product launch. You'll enjoy working on an interesting range of products geared towards a range of markets within the industrial, medical and aeronautical sectors.
- You will be degree qualified, with a University qualification in Electronics or related field
- You will have a good understanding of Digital ASIC Design concepts, with an understanding of physical design activities (for instance synthesis, STA, Place & Route)
- You'll be very motivated, eager to learn and understand new technologies
- You will speak fluent English, able to communicate and work well within a multidisciplinary and multicultural team
Please note candidates must be eligible to work within the EU / France.
For details, get in touch with Caroline @ IC Resources.
Key skills: Digital, ASIC, SoC, IC, integrated circuit, physical design, implementation, backend, logic design, RTL, GDSII, GDS2, Place & Route, P&R, PnR, STA, static timing analysis, floorplanning, clock tree synthesis, CTS, DRC, LVS, power, consumption, timing closure, sign off, tape out, junior, graduate. Location: Grenoble, France, Europe.
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