Senior Analog IC Layout Engineer
- Recruiter
- IC Resources Ltd
- Location
- Germany
- Salary
- Depending on experience
- Posted
- 14 Aug 2018
- Closes
- 11 Sep 2018
- Ref
- JO-1808-134116
- Contact
- Ane Bauer
- Job Function
- Design
- Specialist Area
- FPGA & ASICS, Hardware
- Contract Type
- Permanent
- Hours
- Full Time
Senior Analog IC Layout Engineer
Munich, Southern Germany
Salary depending on experience
A multinational semiconductor company is looking for a Analog IC Layout Engineer for their design centre in Southern Germany to technically lead a small team of Analog IC Layout engineers. In this position you will be working on the layout of analog blocks, such as gm-stages, regulators, up to DC-DC converters and top-level layout.
As the successful Senior Analog IC Layout Engineer you have several years of experience in Analog IC Layout in a Cadence environment at block and full chip level including floor planning ideally in power management.
A solid understanding of BCD Semiconductor technology and common physical effects WPE and LOD is required for this position.
For more information and to apply please contact Ane at IC Resources with your CV!