Senior ASIC Design Engineer
Competitive salary, plus benefits
Senior Digital ASIC Design Engineer - RTL, Southern France
Our client is a fast-growing silicon IP company looking for a Senior Digital ASIC Design Engineer to join their team in Montpellier.
This is a chance to
work on some of the most advanced Semiconductor technology in nodes down to 5nm.
Our client's robust, smooth and flexible IP solutions have gained significant
traction in the market over the past decade, and they now have exciting plans
to double their team size this year.
Currently, they look for an experienced front-end RTL Design Engineer to take charge of implementing and verifying IP RTL. This is a challenging and engaging position, in which you will enjoy working at the interface of hardware, software and application engineering teams. You'll need to be passionate, flexible, and able to commit on deliveries, with a focus on quality and with an entrepreneur mind-set.
The ideal candidate will have:
- A Masters or a PhD degree in Computer Science, Electrical Engineering or similar field
- Solid experience working within ASIC RTL Design, ideally in both VHDL and Verilog / SystemVerilog
- A good working knowledge of RTL development and testing tools (synthesis, simulation, power estimation, timing analysis, …)
- FPGA development experience would be a plus
- Fluent English language skills
- A 'start-up' spirit!
Knowledge of Synopsys Formality would be an added bonus, as would knowledge of Onespin software for formal verification, although by no means essential.
For details, contact Caroline @ IC Resources
Please note candidates must be eligible to work in the EU to apply.