IC Resources Ltd

Senior Digital IC Design Engineer - SERDES

Competitive package
16 Nov 2017
14 Dec 2017
Caroline Pye
Specialist Area
FPGA & ASICS, Semiconductors
Contract Type
Full Time

Senior Digital IC Design Engineer - SERDES


Competitive package

Great opportunity for an experienced Digital IC Design Engineer with an expanding IC Design company in the French-speaking region of Switzerland. This company is a leader in the development of energy efficient communications. This role will suit an experienced Digital Designer with in-depth knowledge in all areas of the front-to-backend ASIC flow, and will involve taking responsibility for High Speed SerDes designs in FinFET technology 16nm and below.

The successful candidate will have a proven background in digital ASIC design with:

* Hands on experience in coding RTL, Verilog preferably for Serdes IP / DDR interfaces, Ethernet switches or SoC in multi-GHz range flip-chip package designs

* Skills in design optimization, timing closure and power optimization of high speed digital logic in advanced process nodes (7-28nm) through the logic implementation loop (synthesis, P&R) using industry standard tools and flows (Cadence, Synopsys, Magma, etc).

* Knowledge of digital IC verification flows, System Verilog assertions, functional coverage, etc.

For this role, candidates must be eligible to work in Switzerland.For more information or to apply, please contact Caroline at IC Resources.

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