IC Resources Ltd

Digital IC Verification Engineer-Switzerland

€85000 - €100000 per annum
10 Nov 2017
08 Dec 2017
David Dixon
Specialist Area
Contract Type
Full Time
Digital IC Verification EngineerSwitzerlandSalary 100-120k CHF depending on experience.
This is an opportunity for an experienced Digital IC Verification Engineer to join a rapidly expanding company based in the scenic and highly desired French speaking part of Switzerland.

Preferred Skills :
* Digital IC verification background with at least some Specman/SV UVM exposure
* Knowledge on Metrics driven verification including test planning and coverage closure
* Constrained random testbench development, SVA and formal verification is beneficial.
* Good scripting techniques and regression set-up and management
* Experience on mixed signal verification and behavioural modelling is an added bonus

You will be self motivated with strong sense of ownership and responsibility. Good communication skills in English are ideal with knowledge in the French language an asset.
Key words: Digital, IC, ASIC, SOC, Verification, Engineer, Specman, SystemVerilog, UVM, OVM, SVA, assertions, formal, mixed-signal, AMS, Location: French speaking part of Switzerland.

Apply for Digital IC Verification Engineer-Switzerland

Already uploaded your CV? Sign in to apply instantly


Your CV must be a .doc, .pdf, .docx, .rtf, and no bigger than 1MB

4000 characters left

By applying for a job listed on Electronics Weekly Jobs you agree to our terms and conditions and privacy policy. You should never be required to provide bank account details. If you are, please email us.