IC Resources Ltd

Digital ASIC Design Engineer - Munich

Location
München
Salary
Excellent remuneration package
Posted
08 Nov 2017
Closes
16 Nov 2017
Ref
J43283
Contact
Caroline Pye
Specialist Area
FPGA & ASICS
Contract Type
Permanent
Hours
Full Time
Digital IC / ASIC Design Engineers
Munich, Germany
€€€ Excellent remuneration package

We are recruiting for a number of Digital ASIC Design Engineers to join a new IC Design team, based in Munich.

Our client is essentially the world's biggest name in consumer electronics; renowned for sheer excellence in hardware and software design. They are looking to hire a best in class in engineering talent, across Digital, Analog and Mixed Signal Design. They are seeking several skilled Digital ASIC Design Engineers across all levels of experience to join their new team focussed on IC development for the smart phone market. These positions offer unparalleled challenge and opportunity; a truly exciting chance to be part of a new ASIC development venture in Munich.

Successful Digital ASIC Design Engineers will develop detailed design specifications and implement the function in Verilog RTL. This team is scheduled for significant growth over the coming year, and engineers will play a fundamental role in the digital design effort for mixed-signal circuits for consumer devices, and the subsequent growth of the team.

Required:
*A Master degree (preferred) in Electronic Engineering, or similar
*Established experience in Digital IC / ASIC Design, with expertise in RTL coding (Verilog / VHDL)
*Knowledge of the best practices with respect to implementation of digital logic
*Strong Understanding of digital design flow including
-RTL simulation
-logic synthesis
-timing constraints and timing closure
-static timing analysis (STA)
-gate level simulation and equivalence checking
*Excellent communication skills in English are essential

Please contact Caroline at IC Resources to apply.

Applicants with experience in the following; Semiconductor, Digital, IC, ASIC, SoC, RTL, Verilog, VHDL, synthesis, STA, timing analysis, timing closure, can be considered for this position. Location: Munich, Germany.