IC Resources Ltd

Graduate/Junior Digital ASIC Design - Cambridge

Location
Cambridge
Salary
Competitive salary and benefits package
Posted
03 Nov 2017
Closes
01 Dec 2017
Ref
JO-1710-118470
Contact
Rebecca Muckle
Job Function
Design, Graduate
Specialist Area
FPGA & ASICS
Contract Type
Permanent
Hours
Full Time

Graduate Digital Design Engineer

Location: Cambridge

Competitive salary + benefits package


Our client is opening a brand new design house in Cambridge, and looking to build a brand new team of engineers working on full SoC projects. As a junior / graduate, you will have the opportunity to work across the complete design flow and learn all aspects of digital IC design, all being mentored by a senior engineer.

This is a rare opportunity to work across the complete flow in a fast paced commercial environment. Our client have offices in Cambridge or Reading and you could be based out of either office, as this is a new team being built, the opportunity for career development is high as you will be joining at the start of the project.


Responsibilities include:


* Understanding of complete ASIC Design flow including architecture, verification of integrated systems, RTL design, synthesis, and timing closure.

* Experience in RTL coding in Verilog or VHDL

* Experience with complex SOC integrations, including advanced verification techniques are a must, System Verilog or VERA experience preferred.

* Great team working and communication skills

* Eligible to work in the EU


If you have passion for technology, thrive off new challenges, and seek the next step in your career; please contact Rebecca Muckle at IC Resources to apply now!

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