IC Resources Ltd

Staff Engineer - SOC Post Silicon Validation

Location
France
Salary
€320 - €340 per day
Posted
19 Oct 2017
Closes
16 Nov 2017
Ref
J43471
Contact
Sasha Booth
Job Function
Test
Specialist Area
FPGA & ASICS
Contract Type
Contract
Hours
Full Time
Staff Engineer - SOC Post Silicon Validation
3 month contract with potential to extend
French Riviera
€320 - €340 per day

IC Resources are working with a successful Design Consultancy based in the French Riviera to find a Staff Engineer - SOC Post Silicon Validation for an initial period of 3 months. Responsibilities of the role will include:

-Validation of complete SOC functionality and electrical interfaces
-Define the validation strategy for the design as a function of its architecture, the expected use cases, the technology the limitations of the tools and the schedule constraints
-Writing and reviewing validation test plans in compliance with Silicon spec and use cases, create validation suite and build automation of diagnostics
-Implement bare-metal drivers and test content
-Execute the validation plan on HW emulators and on Silicon
-Debug of diagnostics on various platforms using JTAG, Logic Analyzers, Oscilloscopes and similar equipment. Propose work arounds.
-Interaction with various engineering teams (like system, hardware design and design validation, software engineers, test engineering) in test-environment
-Bring-up & development to meet team goals and resolve problems in a timely, effective and professional manner
-Determine the quality of the validation by defining coverage goals and methods for measuring these goals. Enhance the test cases until the goals are met
-Perform pre-certification tests as required for standard interfaces

The successful candidate will have experience in:

-SoC post silicon validation
-Board bring up and debug
-Hands on ARM based SOC architecture with knowledge on including CPUs, DMA, MMU, PLLS, memory and peripheral interfaces regarding validation & debug
-Emulation environments for development and debug (Debug tools including JTAG and kernel debuggers)
-Test equipment like Logic analyzer, Oscilloscope and Protocol analyzers
-Understanding of software development process for embedded CPUs and experience in developing and debugging software
-Low level hardware drivers in C language
-Knowledge of bare-metal software C development (compiler, linker…)
-Knowledge of design/verification environment (simulation) is an extra advantage
-Knowledge in Labview/TestStand is a plus

If you fulfil the above criteria and are looking for an new challenge in France please contact Sasha Booth at IC Resources.

Notes: SOC Post Silicon Validation, engineer, contract, French Riviera, test, verification, Oscilloscope, Logic analyzer, Protocol analyzers, SOC architecture, JTAG, kernel debuggers, compiler, linker, Labview, TestStand, simulation

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