IC Resources Ltd

Sr. CAD Engineer - Design Verification - Munich

6 days left

München (81249)
Salary depending on experience
30 Sep 2017
28 Oct 2017
David Dixon
Job Function
Specialist Area
Contract Type
Full Time
salary depending on experience##

Sr. CAD Engineer - Design Verification - Munich

Exciting opportunity for aSenior. CAD Engineer with a Design Verification focus to join a global leader in semiconductor development for low-power consumer applications.

Based in the highly desired city of Munich, and as a member of the Verification CAD team, you will provide support to a team of design and verification engineers creating Analog and Mixed Signal blocks and SOC's for leading edge technology. You will also work within the wider community to
bring-in new ideas and integrate them into the flows to make the verification flows more efficient and robust.

You will :-
Debug vendor tool problems
Interact with DV team to help solve their problems
Implement new functionality to solve emerging problems or to optimize already existing methods
Participate in developing, maintaining, and enhancing an existing system for regressing RTL

To be successful in this role, it is anticipated you will have

5+ years of industrial experience.
Must be very experienced with Cadence Incisive, or Synopsys VCS, or Modelsim
Must be fluent in Verilog and SystemVerilog
Experience with Digital Mixed Signal Simulation is a plus
Experience with Verdi/SimVision/DVE is a plus
Strong Scripting abilities in PERL, TCL or Python is a plus
Knowledge of C or C++ is a plus
Experience with Version Control System (Perforce/Git), is a plus
Experience writing or maintaining a script or Makefile that builds simulation program from RTL is a plus
Good communications skills are required and prior customer support experience is a plus

Excellent communication skills in English are required with knowledge of the German language an asset.

Contact Dave at IC Resources to apply.

Applicants with experience in the following; CAD, Verification, EDA, Semiconductor, Analog, Digital, Mixed Signal, IC, IP, SOC, ASIC, Verification, UVM, SystemVerilog, assertions, SVA, Cadence, Synopsys, VCS, Modelsim, Verilog, PERL, TCL, Python, scripting, VerilogA can be considered for this position. Location: Munich, Germany.

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