IC Resources Ltd

Digital IC Design and Verification Engineer

€55 - €65 per hour + 6 month contract
15 Jul 2017
12 Aug 2017
Paul Wiltshire
Specialist Area
Contract Type
Full Time
Digital IC Design and Verification Engineer
6 month contract
€55-65per hour

IC Resources is currently working with a client in Leuven who is looking for an ASIC design engineer to join their team for an initial 6month project. This client prides themselves on designing Mixed signal and digital IC's and are looking for a senior engineer who can not only add value to the designs but also the team in general.

Engineers must be comfortable working in a team helping to expand the knowledge of some of the more junior engineer. Successful candidates would have experience in VHDL and Verilog for writing RTL and SystemVerilog for the verification. Experience with Synthesis and STA on ASIC would also be beneficial as would any experience with using advanced verification methodologies like UVM or OVM.

My client are
Key Points
- Experience in System Verilog / UVM
- Testbench creation
- VHDL/Verilog
- STA and synthesis
- On-site work in Belgium
- 6 month contract

You must be eligible to work in Belgium for this role, if you would like more information or to apply for this role please contact Paul Wiltshire at IC Resources.

***Please note that if you are interested in the following: Digital Verification, System Verilog, UVM, Verilog, VHDL, STA, Synthesis, Design, Verification, Semiconductors, 6 Months Contract and you could commit to on-site work in the UK then this could be a good opportunity for you.***

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