IC Resources Ltd

Junior Digital IC Verification Engineer - Austria

3 days left

Location
Austria
Salary
Excellent salary + benefits package
Posted
26 Jun 2017
Closes
24 Jul 2017
Ref
J42041
Contact
David Dixon
Job Function
Design, Test
Specialist Area
FPGA & ASICS
Contract Type
Permanent
Hours
Full Time
Junior Digital IC Verification Engineer
Austria
Excellent salary + benefits package

Would you like to grow your career with one of the most innovative IC development companies in the industry today? Creating state-of-the-art mixed-signal IC devices, the organisation is undergoing rapid international expansion and as part of this, they seek a Junior Digital IC Verification Engineer to play a leading role out of their office in Austria.

My client is looking for a Junior Digital IC Verification Engineer to participate in the development process of the company's niche-market mixed-signal products. This will be a technically interesting 'hands-on' verification role using current verification methodologies. You will be working on high performance ICs geared towards power consumption and efficiency for today's booming consumer devices.

Preferred requirements:
* The ideal candidate will have a recognised Engineering degree, with a very keen interest in IC Verification, and previous exposure in this area.
* SystemVerilog for verification using advanced verification methodologies (OVM/UVM or similar such as Specman, e, SystemC, etc)
* Assertions based verification
* Constraint random driven verification
* Fluent in either Verilog or VHDL RTL coding and ASIC design methodology

Experience in the following would be of interest:
- Low power design
- Analog / mixed-signal design

This is a superb chance to join a strong semiconductor company offering highly competitive salary packages and international work opportunities, where you can learn and develop your verification skills.

Contact Dave Dixon at IC Resources for further details.

Key words: Digital, ASIC, ASSP, IC, SoC, Verification, RTL, VHDL, Verilog, OVM, UVM, SystemVerilog, Specman, e, SystemC, C++, class-based, assertions, Semiconductor, Austria.

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