My Client based in Toulouse, France is looking for a DFT Implementation/digital IC Verification engineer on a 6-12 month freelance contract.
Requirements are below for the contract position for DFT Engineer based in Toulouse, France.
Application (What we make):
Design For Test implementation with JTAG in an integrated circuit
Verification of the integrated circuit with the UVM methodology
Application of Power Management
Competence (What we use):
Testability of integrated circuits
Description of the modules to be realized in Verilog and / or SystemVerilog
Content of state machine modules, sequencers, communication interfaces
Verification of these modules in unit tests
Construction of the logic block global verification plan
Participation in the implementation of the audit plan
Verification methodology with UVM
Technology (How we do it):
Description RTL for DFT
EManager / ePlanner of Cadence
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