IC Resources Ltd

FPGA Design Contract

Location
Paris
Salary
€50 - €55 per hour + 3 Month Contract
Posted
07 May 2017
Closes
04 Jun 2017
Ref
J40384
Contact
Parm Shergill
Job Function
Design
Specialist Area
FPGA & ASICS
Contract Type
Contract
Hours
Full Time
FPGA Design Engineer
Paris
3 Month Contract - 50-55 Euros per hour

Based in Paris, the FPGA Design Engineer will be based with an engineering company focused on the development of High Speed, Low Latency designs.

The FPGA Design Engineer will be responsible for the design, development and validation of high-speed and low latency digital circuits, targeting a high end FPGA, focusing on VHDL/Verilog and utilising Xilinx products.

The successful candidate will have a good relevant degree with skills in the following:
*High Speed FPGA Design utilising VHDL and/or Verilog
*Knowledge of one of the following is required: High speed networks (10Gbps Ethernet), PCi, DDR3, Memory controllers
*Knowledge of testbenching and scripting (Tcl/Perl/Python/Bash)
*The successful candidate will be autonomous, able to adapt to changeable priorities, appreciate working in a heterogeneous team, and have good communication skills in both French and English.

Individuals with experience in areas of FPGA, VHDL, Verilog, High Speed will also be considered for the role.

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