IC Resources Ltd

Senior Digital ASIC Design Engineer

Location
Grenoble
Salary
Competitive, stock options, excellent work culture
Posted
13 Apr 2017
Closes
11 May 2017
Ref
J39943
Contact
Caroline Pye
Job Function
Design
Specialist Area
FPGA & ASICS
Contract Type
Permanent
Hours
Full Time
Senior Digital ASIC Design Engineer - Low power IoT, Grenoble

A superb new opportunity for a Digital ASIC Design Engineer has arisen with one of France's hottest Semiconductor start-ups, based in Grenoble.

With a strong funding base and big plans to expand in 2017, our client is looking for a skilled front-end Digital IC Design Engineer to join their team. This is a superb opportunity if you are a Digital RTL Design Engineer keen to push your career forward within an innovative new wireless technology company. You will be working on ultra-long range, low power consumption radio interface technologies for the Internet of Things domain.

The role:
As the successful Digital ASIC Design Engineer you will be involved in the complete ASIC design flow process, from architecture definition, RTL development of signal processing functions through synthesis and validation on FPGA, to supporting physical synthesis, layout and chip sign off.

Required:

Successful applicants will be degree qualified in a relevant subject area such as Computing or Electronics and have proven experience working in Digital ASIC Design, with skills in at least some of the following:

-Digital RTL coding
-VHDL, Verilog or SystemVerilog
-Design architecture and specification
-ASIC Verification
-Synthesis / STA
-Use of EDA tools (Mentor / Synopsys / Cadence)

Experience working in the following would be a benefit, but not essential:
-Wireless communications
-Security / cryptography
-Parallel processing

English language skills are essential. Please note, candidates must be eligible to work in the EU.

With Switzerland to the north, Italy to the east and Provence to the south, you'll enjoy a healthy living standard in one of France's most desirable Alpine locations.

For more information or to apply please contact Caroline @ IC Resources.

Grenoble based opportunity for a Digital ASIC Design Engineer with skills in: Digital, ASIC, FPGA, Design, IC, SoC, system on chip, RTL, integrated circuit, junior, senior, verification, synthesis, STA, VHDL, Verilog, Verification, wireless, telecommunications, MAC, WiFi, signal processing, hardware, security, cryptography, EDA, Cadence, Synopsys, Mentor, Grenoble, France, start-up, job, career.

Apply for Senior Digital ASIC Design Engineer

Already uploaded your CV? Sign in to apply instantly

Apply

Your CV must be a .doc, .pdf, .docx, .rtf, and no bigger than 1MB


4000 characters left


By applying for a job listed on Electronics Weekly Jobs you agree to our terms and conditions and privacy policy. You should never be required to provide bank account details. If you are, please email us.

More jobs like this