IC Resources Ltd

Analog IC Layout Engineer

Location
France
Salary
Salary depending on experience
Posted
10 Apr 2017
Closes
08 May 2017
Ref
J40866
Contact
Ane Bauer
Specialist Area
Analogue, Semiconductors
Contract Type
Permanent
Hours
Full Time
Analog IC Layout Design Engineer
France
Salary depending on experience

A company specialising in leading edge CMOS image sensors is looking for an inspired and proactive Analog IC Layout Engineer for their design centre in France to support their dynamic team in leading a paradigm shift in image sensor design across many industries.

Your key responsibilities will be to floorplan and create cells, block and macro-level abstracts, custom layout and DRC/LVS verified circuits in CMOS technology using leading edge design tools. Being also the interface for the foundry, you will work closely with the Design Engineers and be involved with several projects simultaneously.

*IC layout at the device, cell and block levels and full chip assembly level.
*Layout of full custom Analog and Digital standard cell library components.
*Initial and final block-level and chip-level floorplanning to optimize overall chip layout area and performance.
*Top level chip integration, I/O and ESD pad-ring.
*Physical layout verification (DRC, LVS, ERC)
*Perform parasitic and timing extraction as well as EM

As the successful Analog IC Layout Engineer you will be industry degree qualified in Electrical or Computer Engineering and have 3+ years of Analog IC Layout experience using CMOS technology, ideally below to 65 nm.

You should have knowledge and experience of standard Analog matching and routing methodologies, an understanding of ESD, lithography, EM, DFM, antenna effects and manufacturing challenges. Working knowledge of Cadence Virtuoso, Assure, PVS and Mentor Calibre are essential.
Experience in pixel and column readout, ADC as well as in the layout of ADCs, DACs, PLLs, OPAs/OTAs, bandgap, LDOs, I/V references is a plus as well as working knowledge of Linux system (C, C++, Shell, Skill, TCL, Perl).

This is a unique opportunity for an Analog IC layout Engineer with very good English skills and a passion for their work and an interest in image sensors to join a company in France. French language skill are not a requirement to be considered for this position.

Applicants with experience in: Analog IC Layout, CMOS image sensors, DRC, LVS, ERC, ADCs, DACs, PLLs, OPAs/OTAs, bandgap, LDOs, I/V references, EM, DFM, Linux system, C, C++, Shell, Skill, TCL, Perl, I/O, ESD will be considered. Location: France