IC Resources Ltd

Senior Digital ASIC Design Engineer - Cheshire

Location
Cheshire
Salary
£65000 per annum + Depending on experience
Posted
12 Mar 2017
Closes
09 Apr 2017
Ref
J38803
Contact
Caroline Pye
Specialist Area
FPGA & ASICS, Semiconductors, Systems
Contract Type
Permanent
Hours
Full Time
Senior Digital ASIC Design Engineer - Cheshire

An excellent opportunity has arisen for a Senior Digital ASIC Design Engineer with a small, yet established Semiconductor Company based south of Manchester, Cheshire.

In this position the Digital ASIC Design Engineer will focus on the integration of a small CPU sub-system within a wider system architecture, and the subsequent development of efficient C code algorithms to run on it.

Responsibilities will include:

*Verilog integration, synthesis and modification of a CPU IP block
*Firmware design and verification (creation of low level module and top level test benches)
*Developing and implementing algorithms in C and potentially at machine code level to achieve maximum efficiency of operation
*Supporting the design team on other design tasks within the company.

The ideal candidate for this position should have:

*Proven experience in the design and implementation of a similar CPU sub-system within a system-on-chip (SOC)
*Good working knowledge of state-of-the-art digital design techniques, particularly with regards to size and power consumption
*Good algorithmic understanding, with experience of implementing complex algorithms into hardware
*Familiar with the Cadence design environment

For more information or a confidential discussion, please contact Caroline @ IC Resources

Key relevant skills sought: Digital, ASIC, Design, SoC, System on Chip, IC, implementation, CPU, digital design, IC, Verilog, synthesis, Cadence, EDA, algorithm, C, C++, Matlab, filter design, P&R, place & route, Encounter, integrated circuit design, layout, Semiconductor, Cheshire, Manchester.