IC Resources Ltd

Senior Digital Physical Designer Engineer - Switzerland

Competitive Salary + Full Company Benefits
07 Mar 2017
04 Apr 2017
Caroline Pye
Specialist Area
FPGA & ASICS, Semiconductors, Systems
Contract Type
Full Time
Senior Digital Physical Design Engineer - Switzerland

This is an excellent opportunity for a Senior Digital Physical Design Engineer located in the French-speaking region of Switzerland.

This is an opportunity for a Physical Layout specialist with expertise in digital Place & Route to join a hugely successful, global Semiconductor company developing breakthrough RF technology.

With an exciting and busy year ahead they are currently seeking an experienced Digital Backend Design expert who is capable of taking charge of the synthesis, Place & Route and timing checks for all projects. The team often work on 2-3 projects in parallel; hence the role of the will be very varied. The successful candidate will perform RTL to GDSII flow for a complete chip.

The successful candidate will be a senior engineer, with established experience in Digital ASIC Physical / Backend Design and expertise in:

*Defining timing constraints
*Synthesis using Synopsys Design Compiler
*Place and Route using IC Compiler: floorplanning, placement, custom clock tree synthesis, routing and block finishing.
*Timing closure
*Sign off checks
*Scripting (Perl, Python)

For further details, contact Caroline at IC Resources.

Key skills sought: Digital, IC, SoC, ASIC, Design, Physical Design, Backend Design, Physical Implementation, RTL, Place & Route, P&R, PnR, Synthesis, STA, CMOS, VHDL, Verilog, Synopsys, PrimeTime, IC Compiler, Design Compiler, scripting, Perl, Python, timing closure, timing analysis, EDA, Semiconductor, Switzerland, job.