IC Resources Ltd

IC Packaging Design Engineer

Location
South East England
Salary
Competitive salary + benefits
Posted
05 Mar 2017
Closes
02 Apr 2017
Ref
J39787
Contact
Rachel Anderson
Specialist Area
Semiconductors
Contract Type
Permanent
Hours
Full Time
IC Packaging Design Engineer - Thames Valley

Our global client now requires an IC Packaging Design Engineer to be responsible for new package development and implementing package design flows. Performing design, layout and signal integrity will be required as well as EM modelling of IC, package and PCB using Cadence Allegro tools.

Required skills include:

-Strong IC semiconductor packaging experience
-Experience of using Cadence Allegro design tools
-Signal integrity knowledge for mixed signal and RF products
-Excellent communication skills
-Degree in Physics / Engineering or equivalent.

Please call us to discuss further.

Skills required: IC, semiconductor, packaging, design, Cadence, Allegro, PCB, signal integrity, engineer, EM, modelling, mixed signal, UK, jobs