ASIC Physical Design Engineer
Our world-class engineering team maintains the capability to perform design down to transistor-level where required. Cell library, characterization, and RAM macros are designed in-house. Designs are implemented using structured custom synthesis and placement, or automated EDA tools, where appropriate. Team members are comfortable users of a variety of scripting and programming languages, and capable of using these efficiently to tie together leading commercial tools into a coherent development environment.
We're now looking to add a talented design engineer to the team who can apply intellect and reasoning to a wide range of engineering problems. Someone with a solid understanding of CMOS silicon design, and is a quick learner with an enthusiastic, adaptable, and positive team spirit.
RESPONSIBILITIES:
*Design, implementation, and analysis of high performance and low power microprocessor chips in leading-edge CMOS technology from RTL definition through to final GDSII.
*Block build using a mixture of custom EDA and industry standard P&R tools, and new code where applicable.
*Working with silicon logical design engineers to co-evolve the logical-physical design interface and to optimise designs for performance, power, etc.
QUALIFICATIONS:
*BSc/BA/BEng in Electrical or Electronic Engineering or a related subject.
ESSENTIAL SKILLS:
*CMOS digital chip design and implementation.
*Competence in EDA tools and flows for RTL to GDSII design.
*Strong capabilities in TCL and Perl programming languages.
*Block build flow experience, involving clocking, TA, noise, power, etc.
*Understanding of the physical aspects of EDA tool commands and limitations.
*Design automation and analysis using scripting languages.
*TCL and Perl programming languages.
*Transistor-level circuit design and analysis.
PREFERRED SKILLS
*Experience with Magma and Synopsys design tools.
*Good understanding of microprocessor architectures.