WHAT will be your key responsibilities for this Silicon Verification Engineer role?
- Verification of Digital functions on high-performance digital devices, using the full range of verification methodologies.
- Will involved interfacing closely with Silicon specification authors and logical designers.
- Working in SystemVerilog, PSL, SVA, C, SystemC
- Using Scripting languages such as TCL, Perl and Python.
- Interfacing to internal and external design and verification teams for chip integration IP import, verification plan definition, and silicon debug.
WHAT are the minimum requirements for this Silicon Verification Engineer role?
- Experience of advanced functional verification of complex digital chips
- Good knowledge of ABV techniques
- Experience of pragmatic verification by constrained random simulation and coverage measurement.
- Verification use of a prototyping technologies (FPGA, emulation)
- Programming in Verilog, SystemVerilog, SystemC, PSL, SVA.
- Chip-level verification of CPU-based systems using test written in C and assembly
- Experience verifying performance and power
- Experience verifying some of the following technologies: processors, cache memory sub-systems, system interconnects, complex SoC, DMA controllers, off-chip memory interfaces, high speed serial interfaces, multi-voltage and multi-clock domain circuits.
If this role sounds like you please send through your CV - thank you!