Senior Digital ASIC Design Engineer - Edinburgh
This job has now expired
Based in Edinburgh, the successful candidate will work on the full digital design flow of high quality audio and power management circuits in CMOS. Tasks include: digital RTL design, through verification, synthesis, DFT (design for test) , STA (static timing analysis) and Place & Route. Our client is looking for a proactive, senior level engineer - someone who takes responsibility for solutions and makes them happen.
The successful candidate will have a proven background in the design of digital ASICs, with expertise in VHDL and / or Verilog and complete experience in the full front-to-back end design flow. Experience in low power chip design would be a bonus, as would an understanding of analog or mixed-signal IC design. The role will include some travel from time to time to other European design sites.
An excellent salary is on offer with comprehensive benefits package (including pension, private healthcare and annual bonus).
Email your CV to firstname.lastname@example.org for immediate consideration.
Key words: Digital, ASIC, IC, SoC, Design, RTL, VHDL, Verilog, Verification, Synthesis, timing closure, netlist, Semiconductor, Scotland, Edinburgh
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