IC Resources Ltd

Junior Design Methodology Engineer - Chip - Package - Austria

Excellent Industry Salary
11 Feb 2013
11 Mar 2013
Leon Morrison
Job Function
Design, Graduate
Specialist Area
Contract Type
Full Time
A successful international semiconductor manufacturer seeks a Junior Design Methodology Engineer for their design centre located in Austria.

In this role you will be responsible for the flow and methodology development for both IC Designers and Package Designers.

Tasks include:

*Evaluation of EDA tools
*Analysis and methodology definition for chip and package designers
*Specification and implementation of scripts inside the EDA tools or within a Linux and Windows environment
*Coordination of feature/software development activities at EDA vendors
*Overall flow and methodology test and QA
*Tool, component, flow and regressions test

Responsibilities includes the development of design flows for leadframe packages, which bridges the gap between mechanical CAD (package design environment in AutoCAD) and electrical CAD (chip design environment in Cadence Virtuoso or Cadence Encounter), including connectivity entry, physical layout design of the leadframe and the bonding diagram, DRC, LVS, and the link to electrical and thermal simulation of the complete system of chip and package.

Industry degree qualified (or equivalent) the successful Junior Design Methodology Engineer will have experience in Linux, programming and scripting (e.g Java, Perl, Tcl, C++, Lisp). Basic knowledge in IC or PCB Design (schematic entry, layout) is also required. Knowledge of HTLM5, JavaScript, XSLT as well as of software test automation is desirable.
Strong communication skills in English is required with German, a strong asset. The ability to work well within a diverse and international team is essential.

If your looking for an opportunity to learn and expand your experience then this could be the job for you.

Contact Leon at IC Resources today to apply. leon@ic-resources.co.uk

Key words: Methodology, CAD/EDA Support, IC Designers and Package Designers, mechanical and electrical CAD, Cadence Virtuoso, Cadence Encounter, DRC, LVS, Java, Perl, Tcl. Location: Europe, Austria.

IC Resources - your first contact for CAD / EDA / PDK jobs globally.

More searches like this