ASIC/FPGA Verification Engineer - Cambridge, UK
This job has now expired
A Verification Engineer with excellent complex verification skills (systemVeriog/OVM/UVM) is sought for a challenging and varied role working on the verification of their high-performance, low-latency 10GbE server networking solutions.
Multi-skilled individuals are highly valued within the team, but there are also opportunities for specialization in many areas. Whilst my client is targeting applications at FPGAs, the skills they require are likely to have been gained in an ASIC background.
My client's architectural approach combines hardware and software to deliver high-performance server adapter products and application acceleration middleware for superior performance in a wide range of applications including high frequency trading, high performance computing (HPC), cloud computing, storage and virtualized data centres.
The ideal candidate will;
*Have experience of advanced functional verification of complex digital chips, from testplan creation to verification sign off, using a mixture of Verilog, VHDL, systemVerilog or similar. Experience with Linux / Bash / GNU Make is also required.
*Have experience of relevant verification techniques and methodologies, including co-simulation, coverage collection, constrained random stimulus, TLMs, assertion-based verification, OVM, UVM.
*Programming experience in C and Python would be beneficial, as would experience in any of the following; sockets-based networking, Packet/wired-networking, Ethernet Layer 2 and Layer 3 protocols
Candidates must be eligible to work in the UK.
This is a unique opportunity to join a rapidly expanding company offering fantastic career and skills development opportunities, as well as an exceptional salary and company benefits package.
If this sounds like your next career move then please contact firstname.lastname@example.org to apply or for further details.
Keywords: Digital, ASIC, SoC, Hardware, Software, Verification, RISC, Specman e, Microprocessor, ARM, EDA, UNIX, LINUX, Tcl,Perl, systemC, Vera, Specman e, E Language, C, C++, IC Design, testbench, testplan, object oriented, constrained random, ABV, scoreboard, RTL simulation, travel, cadence, mentor graphics, Synopsys, Xilinix, Altera, Microsemi, Lattice, FPGA, RTL, Design, OVM, VMM, UVM, SystemVerilog, VHDL, Verilog, testbench, Semiconductor, Cambridge, UK, Europe
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