IC Resources Ltd

Physical Design Engineer - Place & Route, Malaysia

Location
Malaysia
Salary
Salary, benefits + work permit sponsorship
Posted
29 Dec 2012
Closes
26 Jan 2013
Ref
J20126
Contact
Caroline Pye
Job Function
Design
Specialist Area
Analogue
Contract Type
Permanent
Hours
Full Time
Opportunities exist for Digital Physical Design Engineers with P&R expertise with our growing Semiconductor client in Malaysia. Work permit sponsorship and relocation assistance provided.

A unique opportunity has arisen for an experienced Digital Physical Design Engineer to join our IC Design client based in exotic Malaysia.

With an enviable customer portfolio, our client is rapidly expanding and seeks a number of Physical Design Engineers to join them working on complex ICs in state-of-the-art CMOS process technologies. You will be responsible for design floor planning, Place and Route (P&R), timing closure, parasitic extraction, static timing analysis (STA) and Physical verification (DRC, ERC, LVS), and covering multiple tapeouts. Some international travel may be required.

Requirements:
*University degree in Electronic Engineering (or related field)
*Proven experience in Physical Design for digital ASICs
*Key expertise in Floor planning, Place & Route (P&R), Clock Tree Synthesis (CTS) Routing, Timing closure, GDSII
*Strong team work ethic and a passion for microelectronics
*Excellent communication skills, both written and verbal

The role offers the opportunity to gain experience working on really cutting-edge designs, within a great location!

Contact IC Resources for further details.

Key words: Digital, Physical, Design, Backend, ASIC, Floorplanning, Place & Route, P&R, STA, static timing analysis, parasitic extraction, low power, Cadence, EDA, Semiconductor, Far East, Malaysia, Asia.

IC Resources - your first contact for ASIC design and verification jobs globally.

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