Senior Digital Implementation / Physical Design Engineer sought for leading IC Design firm in the Thames Valley.
This is an opportunity for a Senior Digital Implementation Engineer to join the Berkshire branch of our leading semiconductor client, and take full ownership of the RTL-GDS2 flow used within the organisation.
This will be a key hire within the business, which will see the Senior Engineer taking full responsibility for the backend digital implementation methodology and ensuring timely delivery of projects. In addition to providing expertise in synthesis, place and route (P&R) and timing closure of digital blocks, the Senior Implementation Engineer will play a lead role to less experienced engineers within the group, and work to develop new tools, concepts and practices to enhance the overall design flow.
Candidates must have an extensive background (7+ years) in digital back-end design / chip implementation, with expertise in floorplanning, synthesis, place and route (P&R), chip finishing and timing closure. Some project leadership experience would be an advantage; candidates also need to have strong commercial awareness and excellent communication skills.
This is a fantastic opportunity to inspire the team with your ideas and take your career in a leadership direction.
Key words: Digital, IC, Implementation, Physical, Backend, Layout, RTL, GDS2, GDSII, synthesis, floorplanning, EDA, Cadence, Synopsys, CMOS, 28nm, Semiconductor, South East, Berkshire, UK.
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