Global Semiconductor giant in the wireless space seeks a Principal Physical Design Engineer to join its growing team.
This person will be a key point of authority within the Physical Design team and will provide definition and leadership in chip implementation activities. On the technical side this will include synthesis, place and route (P&R), static timing analysis (STA), power analysis, production test, etc. Together with the Group Leader, the Principal Engineer will guide and coach the team, and interface with external EDA tool suppliers and other third parties.
Required:
*A solid background in digital ASIC implementation
*Experience of full custom / transistor level design
*In-depth understanding of RTL-GDSII flow, preferably with experience of Synopsys toolchain
*Ability to act as technical leader/managerial figure within a physical design team
For more details contact Caroline at IC Resources.
Key words: Principal Physical Design Engineer, Digital, Implementation, RTL-GDSII, GDS2, back-end, design, floorplanning, place & route, P&R, EDA, Synopsys, Verification, Verilog, perl, tcl, scripting, UK, Cambridge, South East, Semiconductor.
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