ASIC Verification Lead - Cambridge
This job has now expired
This position is a 'hands-on' technical lead role, which will involve formulating the Company's verification approach moving forwards and coordinating a small team to achieve technically challenging verification objectives in a short time-frame. The right candidate will be a proven veteran in ASIC Verification, able to lead a small team and work under pressure to tight deadlines. Experience in the following is required:
*Formulating and writing System Verilog coverage statements
*SVA assertions or similar
*System Verilog, Verilog and C++
*Creation of test benches and testing
*Experience of UVM in order to setup a verification environment.
Our client's commitment to creativity and innovative solutions means that they want to attract the most talented people in industry. A superb remuneration package is on offer for the right candidate, including share options and benefits package.
Key words: Digital ASIC Verification, Silicon, Lead, SystemVerilog, Verilog, testbench, OVM, UVM, Semiconductor, Cambridge, East Anglia, UK.
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