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This brilliant role will give you the chance to specialize in Physical Design where you will work in areas such as; Floor planning at sub-block level ,Standard cell placement, including timing and congestion optimisation ,Clock tree synthesis (CTS), including balancing and optimisation ,Routing and Signal Integrity (SI) optimisation ,Design rule checking (DRC/LVS) Timing analysis and closure (STA).
The successful candidate for this role will have an understanding of, or exposure to Place and Route techniques as well as a good understanding of the factors that affect the clock frequency that can be attained in a digital circuit. You will also need to have an awareness of the factors that impact the physical implementation of a digital circuit as well as an appreciation of why and how low power designs are achieved.
In this role you will need to have good understand of digital circuits, an interest in digital circuit design at silicon level and be analytical with good problem solving skills.
You will need a 1st or 2.1 equivalent degree in Electronic Engineering or related subject.
To apply for Graduate Physical Design Engineer based in Hertfordshire please send your CV and covering letter to dadams@redlineplc.Com, or for more information contact Dave Adams on 01582 878824. Ref: DIA-20/157