Junior Digital IC Design Engineer - ASIC, Germany
This job has now expired
Working within a team of analog and digital IC design engineers, you will have the responsibility of developing and implementing digital circuit components in CMOS, covering VHDL coding, RTL synthesis and Place & Route. It's a great chance to gain experience of the entire digital design flow and learn from world-class engineers.
The successful candidate will have up to three years experience in Digital IC Design; recent graduates can be considered if they have strong relevant project experience. Experience of RTL design in VHDL or Verilog is required, ideally with knowledge / experience in synthesis, DFT (design for test) and Place & Route (P&R). Fluent language skills in English are essential, German is preferred.
Key words: Digital, ASIC, IC, Design, RTL, VHDL, Verilog, SoC, Synthesis, DFT, Design for Test, P&R, Place and Route, EDA, Semiconductor, Germany.
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