ASIC Verification Engineer - South West
This job has now expired
With rising share prices and increasing product demand, our expanding Semiconductor client has been big news this year. As part of a phenomenal growth phase, they are looking to expand their verification teams in the UK and Germany.
Opportunities exist for engineers at various levels of experience.
The ideal candidate will;
*Be skilled in block level verification and proficient in Verilog, systemVerilog, OVM/UVM/VMM as well as object orientated approaches to Test bench development
*Have exposure to constrained random techniques, ABV and scoreboard implementation and experience with RTL simulation and hardware design
*Be capable of developing verification strategies for complex IC designs, making test plans, and be well versed in C/C++
Some international travel may be required from time to time with this position, and candidates must be eligible to work in the UK.
This is a unique opportunity to join a rapidly expanding company offering fantastic career and skills development opportunities, as well as a competitive salary and uncapped bonus, along with other company benefits.
If this sounds like your next career move then please contact firstname.lastname@example.org to apply or for further details.
Keywords: Digital, ASIC, SoC, Hardware, Software, Verification, RISC, Specman e, Microprocessor, ARM, EDA, UNIX, LINUX, Tcl,Perl, systemC, Vera, Specman e, E Language, C, C++, IC Design, testbench, testplan, object oriented, constrained random, ABV, scoreboard, RTL simulation, travel, cadence, mentor graphics, Synopsys, Xilinix, Altera, Microsemi, Lattice, FPGA, RTL, Design, OVM, VMM, UVM, SystemVerilog, VHDL, Verilog, testbench, Semiconductor, South West, UK, Europe
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