attractive hourly rates
Based in Berkshire, our client is currently seeking an experienced FPGA design engineer fully conversant with Altera Stratic 4 FPGA devices, VHDL and RTL design. The initial contract is for 3 months with a strong likelihood of extension.
Key tasks / responsibilities:
RTL design (VHDL or Verilog) of modules from specification in C/C++
Driving Quartus tools
Altera Stratix 4 FPGA devices
Coding for high speed interfaces - PCIe, Gbe, XAUI, etc
Debug hardware containing FPGAs using bench test equipment or SignalTap
Key skills:
1st or 2.1 Electronics, Physics or Computer Science from a Tier 1 University
5+ years experience in industry.
Strong FPGA tools knowledge including timing closure for Altera FPGAs
Strong FPGA device knowledge including 3rd party IP availability
Implementation of high speed interfaces such as PCIe, GbE, rapidI/O
Bench testing and debugging hardware problems
Applications knowledge in Networking, high speed interfaces
Berkshire, Reading, Slough, FPGA, Altera, Stratix, RTL, PCle, VHDL, Verilog
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