ASIC Verification Engineer
This job has now expired
Having recently launched their first full product to market, they are looking for a skilled verification engineer who is interested in using their skills to help develop their next generation of products, and contribute to the overall growth of the company.
The ideal candidate will;
*Have very strong C++ development skills
*Have experience in verifying complex designs using SystemC or SystemVerilog, using directed and constrained random techniques
*Need to be able to quickly understand large-scale hardware designs and know how to develop tests to verify them fully.
*Be self-motivated, and enthusiastic with the ability to prioritise and organise an evolving workload, with experience of working within Ethernet networking.
The successful candidate will play an important role, liaising with multiple team members to extend and improve verification infrastructure and scripts, and agree and prioritise verification tasks within the team. You will also be responsible for developing and maintaining SystemC and SystemVerilog testbenches for blocks of a complex high-performance network ASIC, and developing, debugging and understanding tests to ensure complete functional and code coverage is achieved.
A competitive salary (based upon experience) is on offer, along with benefits including Holiday, Private Health Care, Shares and more.
If this sounds like you please contact email@example.com for further details.
Candidates must be eligible to work in the UK to be considered.
Key words: Digital, ASIC, SoC, Hardware, Software, Verification, RISC, Specman e, System C, E- Code, Microprocessor, FPGA, RTL, Design, OVM, VMM, UVM, C, C++, C#, Ethernet, DDR, DDR2, Sonet, Networking, Telecommunications, SystemVerilog, VHDL, Verilog, testbench, Semiconductor, England, UK
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