Senior Physical Design Engineer - IC Compiler - Contract - Switzerland
A talented senior Physical Design engineer with excellent knowledge of Synopsys design suite is currently required for an initial 6 month contract with an established semiconductor consultancy in Switzerland
You will be responsible for the digital layout of functional blocks up to 1 million gates in deep sub-micron technology
Responsibilities
- Floorplanning
- Place & Route using Synopsys IC Compiler
- Physical Verification
- Static Timing Analysis using Primetime
- ECO's
- DFM analysis and implementation
- MVRC
Immediate start dates are available and the contract will run initially until December apply today with an updated CV and details of availability for more information and to be considered.