This is an excellent opportunity for a Design for Test (DFT) Engineer to join a rapidly expanding company developing state-of-the-art components for the Semiconductor industry.
The successful DFT Engineer will be responsible for:
· providing a DFT specification describing the test concept and specifying the Implementation
· developing BIST, BOST and ATE-based testing concepts
· reporting weekly progress and continuously re-estimate outstanding activities.
You need:
· a degree in Electrical Engineering / Computer Science / Physics or related subject
· several years experience in complex ASIC development, both for digital and analog circuits, and in the architecture and implementation of DFT for such circuits.
· skills in BIST, scan, test compression, STA, boundary scan.
For the right candidate, this company offers a lucrative salary as well as training courses, enabling employees to develop in their main field of expertise as well as move towards new technical areas and promising professional opportunities.
Key words: design, DFT, SoC, digital, analog, ASIC, BIST, BOST, VHDL, Verilog, Synthesis, layout, design for test, scan, boundary scan, test compression, STA, static timing analysis, physical, back-end, test, semiconductor.
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