Verification engineer- Senior & Principal- Cambridge

Verification engineer- Senior & Principal- Cambridge

An exciting world leader has both senior and principal positions open for an experienced and enthusiastic verification engineer. Working as a verification engineer, you will have the opportunity to lead the definition of verification strategies and you will also make a substantial contribution to the ASIC verification strategy that will be implemented.

In addition, you will have the opportunity to take the lead responsibility over various, challenging projects.

The ideal candidate will have the following:
- Hands-on verification experience with other verification techniques/methodologies such as directed testing, formal property checking, FPGA/Emulation flows and device bring up
- Familiarity with RISC microprocessors and microprocessor systems
- Experience of Verilog
- Perl, python or other scripting language

In return, you will receive a competitive salary and a competitive bonus and reward package.

Key words: Senior/Principal/ Verification/Engineer/ Verilog/ASIC/FPGA/Cambridge