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Senior / Principal Digital Designer – ASIC /FPGA
Cambridge, £40,000 - £65,000 plus package
Altium Associates, a specialist microelectronics consultancy, is currently working with an exciting, early stage start-up developing innovative solutions to the semiconductor industry. As part of their growth, our client is seeking a Senior / Principal Digital ASIC / FPGA Design Engineer to join an elite, growing team implementing and architecting a novel solution.
We need to present individuals with excellent academics, strong silicon RTL design experience for complex ASICs and natural creative flare. Being a relatively early stage start-up, we do require someone who understands and can adapt to the culture and environment that is synonymous with a true start-up – it is a definitive dynamic.
Suitable candidates will be able to demonstrate skills and experience in the following areas:
• Minimum B.Sc. in Electronic Engineering or similar, M.Sc. or Ph.D. preferred
• Previous tape out experience of complex ASIC / FPGAs
• Excellent RTL coding experience for block and chip level
• VHDL or Verilog programming experience
• Verification experience beneficial – SystemVerilog
• Architectural design experience ideal
• Appreciation of complete SoC design
For this position there is a strong salary and options package, for further details please send CV and cover letter.