Senior Digital Design Engineer - ASIC, DFT, STA - Contract - Netherlands
A leading microelectronics consultancy is currently recruiting for an experienced digital design engineer with good knowledge of the digital back end flow for an initial 6 month contract to be based in Netherlands
You will join an experienced digital design team with a specialism in system power management and have the overall responsibility for block and top level ASIC design for power management products
Responsibilities
- Block and top-level design from specification to synthesis and STA clean netlist
- Design of optimised digital blocks meeting functional, cost and low power constraints
- Develop TCL scripts and design constraints to perform synthesis, DFT insertion and STA
- Verification planning, feature extraction and verification test case developmnent
Essential Experience
- Fluent in VHDL RTL coding and complete knowledge of ASIC design methodology
- Excellent knowledge of developing design constraints and synthesis scripts (Synopsys)
- Proficiency in developing block and top level timing constraints for STA and P&R handoff
- Experience of low power digital design techniques
Initial 6 months can be offered, May start dates are available apply today with an updated CV for more information and to be considered